1. Field of the Invention
The present invention relates to using scanning electron microscopy (SEM) to study defects in wafer structures. Wafer structures are articles having a plurality of very thin layers on a wafer. An example of a wafer structure is an integrated circuit fabricated on a semiconductor wafer.
More particularly, this invention relates to a method of obtaining defect depth information which can be used to help determine the layer of a wafer structure in which a defect is located. In other words, the invention ultimately involves classifying and determining the depth of a defect. Defect depth information may include contour height information.
The invention is advantageous in that, by determining the depth of a defect, a corresponding processing step may be identified for further scrutiny.
2. Background
Until the present invention, the study of defects in wafer structures has focused on determining whether the particular wafer structure is faulty and, if so, whether the wafer structure should be discarded or kept. This conventional approach will now briefly be described.
Many steps are typically required in producing a wafer structure. The sizes involved are very small, however, and it is not unusual for a defect to occur. An example of such a defect, which will be mentioned many times in this discussion, is the accidental introduction of an undesired particle. Many other defects are possible, as is well known to those acquainted with this field, and the invention is to be understood to relate to all detectable defects. For the sake of focusing attention on the invention, however, the particle defect will provide an easily-understandable example of a defect. A particle is an example of a protrusion defect. Protrusion defects xe2x80x9cstick upxe2x80x9d from the surface. Another kind of defect is a recess defect, like a pit or a scratch. Recess defects recede into the surface.
It will be appreciated that a protrusion defect may include a particle or other unwanted structure on top of a surface, or a bump that is a manifestation of a particle/unwanted structure below a surface. Since the production of wafer structures involves many layers, it may be more common for a protrusion defect to be manifested as a bump which reflects a sub-surface particle, instead of as a particle itself on top of a surface.
Because defects occur, inspections are necessary. Inspecting only the finished product is economically impractical, for several reasons. One reason is that a defect that occurs early in the manufacturing process might be obscured by the layers deposited in subsequent steps. Another reason is that, if a defect in a wafer structure can be detected earlier, then the further devotion of time and resources to that particular wafer structure can be avoided.
Although the inspection of only the finished wafer structure is economically impractical, so too is the inspection of the wafer structure after each manufacturing or process step. The production of wafer structures typically involves hundreds of steps, and inspecting after each step would unacceptably slow production. Furthermore, each inspection adds to the cost of the final wafer structure, and an inspection after each step would make the end product prohibitively expensive.
In view of the foregoing, inspections are normally performed after only critical steps. Every different wafer structure product will necessarily have somewhat different critical steps, and persons versed in the production of wafer structures already understand how to select which steps are critical and which are not, and how to balance such a selection against the economic considerations. Practical considerations also take a role in determining when inspections are to be performed. For example, where automated robotic processing is involved, it may be the case that several steps are performed automatically and that access to the wafer structure is not possible until a final step. Thus, a critical step in such a system might be the final step in a series of automatically performed steps.
After each critical step in the manufacturing process, the wafer structure is inspected. In particular, the wafer structure may be placed in an inspection station for initial defect detection.
One example of an inspection station is an optical inspection station, such as that described in U.S. Pat. No. 5,699,447 to Alumot et al., hereby incorporated by reference. This inspection station for initial defect detection may be referred to as a first optical review station, or as a first optical inspection station.
The first optical inspection station performs a die to die or a cell to cell inspection and flags x,y coordinates for cells or dies differing from the others. Although no two dies/cells will be perfectly identical, an optical inspection station such as that described above has a threshold. Where the differences exceed the threshold, the die/cell is flagged. The comparison is statistical in nature, and lends itself to computer processing.
The optical inspection station provides a notification of the flagged locations that contain differences that are supposed by the optical inspection station to be defects (i.e., the differences that exceed the threshold). This notification typically takes the form of a defects map.
A defects map provides, for each supposed defect in the wafer structure, the location of the supposed defect. To be more precise, the defects map treats the wafer structure as a plane and provides planar coordinate information (i.e., x and y coordinates) so that the supposed defects can be located for further inspection. The inspection equipment of the optical inspection station is therefore useful for detecting the possible presence of defects.
After a critical step, when the defects map indicates a supposed defect, the wafer structure then must be reviewed in more detail. To review the wafer structure in more detail, the wafer structure typically is given a more detailed optical review (as mentioned in U.S. Pat. No. 5,699,447).
The defect determination possible from this second optical review is more detailed than that possible at the first optical inspection station. At this optical review station, the supposed defect of the wafer structure is studied. In particular, the supposed defect location coordinates are used to bring the supposed defect directly under the optics of the station.
Using the optical review station, there is typically made a more accurate determination as to whether there is a defect, such as a particle, in the wafer structure. Given the limited level of detail possible at the first optical inspection station, it may happen that no actual defect is noted by the second optical review station at the location where a supposed defect was indicated. In other words, the second optical inspection station may be used to differentiate between actual defects and falsely detected defects.
Optical inspection stations have been described above in relation to making a determination as to the existence of a defect. Another known station which may be used for review is a scanning electron microscope (SEM). An example of a SEM may be seen in U.S. Pat. No. 5,659,172 to Wagner et al., which is incorporated by reference. A SEM also may be used to determine the presence or absence of a defect at a location indicated by a defect map. In particular, a conventional SEM provides an SEM image of an area containing a suspected defect, the image forming the basis for a defect determination.
The present inventor has determined that the above-identified approach using only optical review or using a combination of optical and SEM review leaves much to be desired in the prevention of future defects. This deficiency in the conventional approach will now be described.
It will be recalled that not all of the manufacturing process steps, for economic reasons, are critical steps. There are normally several steps, and perhaps many steps, carried out before each critical step. The manufacturing process steps may thus be thought of as being grouped in modules, each process module culminating in a critical step and then an inspection.
Furthermore, there are now systems that support the automated processing of wafer structures. Two excellent examples of such automated processing systems are the CENTURA(copyright) system and the ENDURA(copyright) system, each available from Applied Materials(copyright), Santa Clara, Calif. (CENTURA(copyright), ENDURA(copyright), and Applied Materials(copyright) are registered trademarks of Applied Materials). Automated processing systems may be understood as having an auto mated processing chamber corresponding to each step.
The chambers in the CENTURA(copyright) and the ENDURA(copyright) are arranged in a useful fashion around a robotically controlled hub, with the hub being controlled so as to deliver wafer structures from one chamber to the next at the appropriate times. Actual automated processing systems are very complex, and provide many features not explained here. It is important to note that some of the goals of automated processing systems include improving production quality, consistency, and throughput, and also minimizing manual interaction. Thus, once a wafer structure is introduced into the initial chamber of an automated processing system, access to the wafer structure is unavailable until the wafer structure is removed from the final chamber. From the final chamber, an inspection may be performed, and then the wafer structure may be introduced into the initial chamber of another automated processing system for continued manufacturing.
Using the terminology introduced earlier, an automated processing system includes a plurality of chambers. The chambers are used to carry out a corresponding plurality of steps with respect to wafer structures. The steps carried out on a given wafer structure in a given automated processing system define a module. The module has a plurality of steps, and performs each step in one of a plurality of chambers.
When a defect is found in a wafer structure during inspection, sound production engineering dictates that the cause or source of the defect be identified. This is not always simple, and involves some very practical considerations. To explain, it may be supposed that there is an automated processing system with 10 different chambers. Moreover, a different engineer typically is assigned to and responsible for each chamber. The 10 chambers define, e.g., 10 steps in a module which is part of a larger wafer structure manufacturing process.
Now, suppose a wafer structure is indicated by an optical review station as having a possible defect. The defects map is used by the optical review station to make a more detailed inspection of the supposed defect. Suppose the more detailed review of the supposed defect confirms the presence of a defect. Many defects are so small that not much useful information can be gleaned from an optical inspection of them.
Now suppose that the defective wafer structure is brought to a SEM review station for further inspection.
SEM, by its nature, has a very large depth of focus. This means that, even though there may be a plurality of layers built up on the semiconductor substrate, a substantial thickness of the wafer structure appears to be flat. Because a substantial thickness of the wafer structure appear to be flat, height contour information relating to the defect cannot be obtained, and the type of defect and the layer in which the defect occurred cannot be determined. It is known to tilt the sample at a high angle relative to the primary beam to achieve better depth resolutions, however, this procedure may obscure certain defects.
The wafer structure is placed on the stage of the SEM with the planar coordinates of the supposed defect centered under the SEM beam. The SEM xe2x80x9ctakes a picturexe2x80x9d of the wafer structure and appears to confirm the presence of a particle. Since the wafer structure appears flat, however, it is hard to tell whether the defect is a particle or a kind of a scratch or pit. Even if it is determined that the defect is a particle, it is is hard to determine ether the particle is on top of the wafer structure or is embedded in one of its layers.
The conventional approach thus yields some information about the defect, but not much. In particular, the determination of height contour information relating to the defect (i.e., whether the defect protrudes or recedes from the surface, and how much) is problematic. This limited information makes it difficult to decide where to begin to improve the production process. As a practical matter, each of the 10 engineers will insist that his particular chamber was not responsible for the defect, and that it must have happened somewhere else. The conventional approach to defect study may help eliminate one or two of the steps as causing the error (and, therefore, one or two of the chambers), but enough information to pinpoint a place to start investigating is not provided.
It will be assumed that the defect, which is a possible particle/pit/scratch, could not have occurred in two of the chambers. This leaves eight chambers, and eight engineers to deal with. The production manager may select all of the chambers for investigation in parallel, but this is very expensive in terms of time and manpower resources. The manager may select one or perhaps a few chambers based on intuition, experience, seniority of the engineer, or some other heuristic.
Presently, the foregoing situation is not atypical of current quality improvement efforts. Managers do not have enough information to suitably narrow down the possibilities, and they accept that they have to start somewhere.
A recent publication discloses a new approach in using SEM for inspection of wafers. Specifically, U.S. Pat. Nos. 5,412,210 and 5,594,245 disclose a SEM which uses a relatively high acceleration voltage so that electrons penetrate into the wafer, rebound by colliding with atoms inside the wafer, and generate secondary electrons upon hitting the surface of the wafer in the rebound trip. Using this approach, information is gathered concerning structures imbedded in the wafer. These patents also disclose that, by taking two pictures, one with the e-beam coming directly perpendicular to the wafer, and another one with the e-beam coming at an angle, one can construct a three-dimensional configuration of the imbedded structure. The relatively is high acceleration voltage used is considered by the industry as extremely undesirable and represents a crucial disadvantage of the systems and approaches described in the above-identified two patents.
The inventor has noted that it would be desirable to scrutinize only the particular one of the ten steps at which the particle was introduced. By improving the particular defect-causing step, future defects might be prevented. Even if the one step could not be identified, intelligently narrowing the number of chambers for initial study down to just a few would be a great improvement over the way quality improvement is approached today.
The inventor has determined that, to achieve such an improvement, it is necessary to obtain depth information concerning the defect so as to know the layer in which the particle is embedded. Once the layer is known, the corresponding one of the plurality of steps in the module can be identified. The step identifies the corresponding chamber. Finally, the chamber identifies the engineer that must first investigate the source of the problem.
The SEM is the review tool with the possibility to provide the most information concerning the defect. Because of the large depth of focus of the SEM, however, no further height/contour information relating to the manifestation of the defect is available. The wafer structure appears completely in focus over a substantial thickness thereof. Since the layers in question are all in focus, the wafer structure and the particle/bump/pit/scratch appear flat. Because the wafer structure and a particle appear flat, a particle looks the same whether it actually is on top of the wafer, is implanted in the first layer down, is implanted in the second layer down, or is implanted in another layer.
Because the SEM image does not yield contour information relating to which layer a particle (or other defect) may be in, it is impossible to determine from the conventional SEM which step of the module must be scrutinized.
The inventor has thus noted a need to obtain height contour information relating to a defect in a wafer structure. Such height contour information can be used to determine (or at least reasonably approximate) the depth of a defect in a wafer structure. By determining the depth of a defect in a wafer structure, the corresponding defect-introducing process step (and, hence, the corresponding chamber and responsible party) can be identified. Even if the defect might have occurred in one of two chambers, or even three, determining the depth of a defect would help a manager intelligently narrow down the number of chambers for scrutiny and thus more efficiently improve quality.
A second deficiency of the above-identified conventional approach is that many defects cannot correctly be characterized. More particularly, the conventional approach does not provide any depth information concerning a defect, and cannot reveal whether a defect is flat, is a protrusion defect, or a recess defect.
To explain, it is important first to note that even very small defects can be vitally important. In the manufacture of wafer structures, many layers are typically used. After applying a certain number of layers, the surface of a wafer structure begins to become uneven. It is difficult to apply, with precision, patterned conductor lines on an uneven surface. To correct this unevenness, a process of chemical mechanical planarization (CMP) may be undertaken.
Briefly, CMP may be conceptually understood to involve laying a comparatively thick filler layer of insulating material over the uneven surface. The filler layer fills in the uneven parts of the wafer structure. The filler layer is subsequently smoothed, or planed. The planarization may be thought of as a polishing activity. Inherent to any polishing activity is the likelihood of producing small scratches on the surface to be smoothed.
In wafer structures, such scratches may be extremely small. Extremely small scratches may appropriately be called microscratches. Microscratches can be especially problematic for two main reasons. First, microscratches are difficult to detect. Second, microscratches sometimes form a subsurface channel. During manufacturing, conductive material may be unintentionally disposed in a microscratch and might not be completely removed. When filled with conductive material, a microscratch may therefore create a short circuit.
Microscratches have been explained to show an example of a recess defect, to show that even very small defects can be important, and that it is important to detect as many defects as possible. Since the conventional optical and SEM provide only one image, however, it is hard to characterize correctly such small defects.
If a defect could be confirmed as a scratch, then the attention of a manager would be drawn to a CMP chamber. If a defect could be identified a protrusion such as a bump or a particle, then other chambers would command the manager""s attention. A flat defect would often mean a pattern disposed in an incorrect location. Whether a defect is flat, is a protrusion, or is a recess may be referred to as depth information concerning the defect. Another way of referring to this information is to describe it as height contour information or, more simply, contour information. Even without knowing the depth of a defect with respect to the layers of the wafer structure, knowing the contour information about a defect would help a manager to know the defect""s shape, and to make a more intelligent decision as to which chamber is the best candidate for initial investigation.
Consequently, it is very desirable to have an automatic classification of the defects. That is, in addition to having the inspection equipment provide a defect map and overall defect density, it would be very desirable for the equipment to also provide classified defect density, i.e., the density of the defects by classes. However, to do that, the equipment would have to be able automatically to classify the defects. This is a very complicated engineering problem, and is currently being approached by seeking solutions using image analysis. However, it would be helpful to support or to enhance the automatic classification using more information, such as depth and topography information, which can help in finding the root cause of the problem.
The above-identified equipment and approaches give neither the height or depth of a defect, nor any contour information.
It is an object of this invention to overcome the deficiencies and shortcomings mentioned above. In particular, it is an important object of this invention to set forth a method and a SEM review station for determining the depth and topography of a defect in a wafer structure.
It is another object of the invention to set forth a method and a SEM review station for providing contour information relating to a defect so that the defect may be characterized and classified.
The foregoing objects of the invention, in brief, are realized in the use of multiple SEM images to determine contour information for determining the depth (or height) of a defect in a wafer structure. In one embodiment, stereoscopic SEM images are used. In another embodiment, multiple perspective images are used.